A Quick Look at the TinyFGPA & Lattice Diamond

A Quick Look at the TinyFGPA & Lattice Diamond

A Quick Look at the TinyFPGA & Lattice Diamond

I’ve long since had an interest in the embedded world, particularly in FPGAs. So it’s been really exciting to see FPGAs making their way into the hobby electronics scene over the past few years. As an FPGA developer, aside from an HDL lab during my undergrad, I’ve been exclusive to the Xilinx family of FPGAs and their development IDE, Vivado (with which I have an on again-off again relationship with, but overall I think it’s a great tool).

However, most Xilinx development boards are on the higher end of the price scale for hobbyist (the barebones cheapest I could find was $80), and Vivado has quite the learning curve to it even for an experienced FPGA developer. Personally, I was looking to venture outside of my Xilinx bubble simply for the sake of learning something new and I wanted a quick/cheap way to get started.

Enter the TinyFPGA… For a whopping $12, I got myself the A1 model from TinyFPGA’s lineup. The TinyFPGA series are a great development board option for the Lattice Semi FPGA family. The A-series boards are equipped with chips from Lattice’s Mach chipset, the B-series boards are equipped with a chip from Lattice’s ICE series, and the newer TinyFPGA EX has one of Lattice’s ECP chips. For the A1 board, the MachXO2–256 offers the following respectable specs for such a tiny package (pun intended):

  • 256 LUTs
  • 2Kbit distributed RAM
  • 18 dedicated IO
  • 4 shared IO
  • Internal flash memory
  • Embedded function blocks for I2C, SPI, and timers

To get started, I first downloaded and installed the Lattice Diamond IDE. My hopes were high when the first tag line on Lattice’s download page was “Adapting to a new tool is hard. Lattice Diamond makes this easier…” The install was straightforward and Lattice will provide a free license file at request (they just want to make sure you’re just a hobbyist and not a business). Once installed and ready to go, I flipped over the the Github repository TinyFPGA has for the A-series and grabbed the .LPF file and template top level Verilog file for the A1 board. For those of you familiar with Xilinx, the .LPF file is the Lattice equivalent to an .XDC file in Vivado. This file is the constraints file for mapping external net names from the design to specific package pins on the device. The Verilog top file that TinyFPGA provides is a convenient starting point as it lines up some generic net names to the .LPF constraints file and has a top level module defined already.

Armed and ready, I created a new project in Lattice Diamond:


A Quick Look at the TinyFGPA & Lattice Diamond was originally published in Hackster Blog on Medium, where people are continuing the conversation by highlighting and responding to this story.